SAN MATEO, Calif. Synopsys Inc. hopes to hold on to a slight lead in the formal verification market as it moves customers from the Design Verifyer tool to its internally developed Formality ...

Claiming a new approach to functional RTL verification, Synopsys Inc. this week will announce a hybrid product that combines a formal property-checking capability with the company's VCS Verilog ...

Time-saving verification tools have been added to an advanced tool flow for high-end FPGA design. The flow, a collaboration between Xilinx Inc. of San Jose and Synopsys Inc. of ...